MTCA workshop for accelerator and physics in Japan

26 Oct 2021, 10:00 → 28 Oct 2021, 17:40 Asia/Tokyo

Virtual (Zoom)

The MTCA workshop for accelerator and physics in Japan 2021 will be held in a virtual format. The goal of this workshop is to boost the application of MTCA in Japan by exchanging the information and experiences. The first day, Oct 26, is dedicated for the tutorial session in Japanese. The other two days consist of oral presentations.

Password for tutorial videos was sent on December 13 (Mon) to the registered participants.  Zoom link for the workshop was sent on October 25 (Mon) to the registered mail addresses.  Presentation instruction explains the procedure for the speakers to follow.

Dates: Oct 26 (Tue) - 28 (Thu), 2021
Venue: Virtual (Zoom)
Registration fee: Free
Official language: English except the tutorial sessions in Japanese on Oct 26

Important dates
Registration opens: September 1, 2021
Abstract submission opens: September 1, 2021
Abstract submission closes: October 14, 2021
(Abstracts were accepted in the registration page.)

Organizers
Fumihiko Tamura (J-PARC), Kazuro Furukawa (KEK), Masahito Yoshii (J-PARC), Norihiko Kamikubota (J-PARC), Yasuyuki Sugiyama (J-PARC)

(https://www-conf.kek.jp/mtca2021/)

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加速器と物理のためのMTCAワークショップ 2021をバーチャル形式で開催いたします。本ワークショップでは、MTCAに関する情報や経験を交換することで、日本におけるMTCAの利用を促進することを目的としています。初日の10月26日には、日本語によるチュートリアルセッションが行われます。残りの2日間は、口頭発表を行います。

チュートリアルの映像のパスワードは、12月13日月曜日に登録者宛に送られました。ワークショップのための Zoom リンクは、10月25日月曜日に登録されたメールアドレスに送られました。口頭発表の手順に発表者へのお願いを記載しています。

日程: 2021年10月26日(火) - 28日(木)

会場: Zoom を用いたバーチャル開催
参加費: 無料
言語: 10/26 の日本語チュートリアルを除き、英語

締切等
参加申し込み受付開始: 2021/9/1
アブストラクト受付開始: 2021/9/1
アブストラクト受付終了: 2021/10/14
(アブストラクトは registration page で受け付けました。)

世話人
田村文彦 (J-PARC), 古川和朗 (KEK), 吉井正人 (J-PARC), 上窪田紀彦 (J-PARC), 杉山泰之 (J-PARC)

Web home (https://www-conf.kek.jp/mtca2021/)

Tuesday, 26 October

10:00 → 10:10 Openning: Fumihiko Tamura

mtca2021-tamura-opening.mp4

mtca2021-tutorialopening-tamura.pdf

10:10 → 10:50 加速器に広がるMicroTCAプラットフォーム ～ MicroTCAの基礎と概要 ～

Speaker: 白井 野之

mtca2021-shirai-211025.pdf

mtca2021-shirai-overview.mp4

10:50 → 11:30 AMC の作り方

Speaker: 漁師 雅次

mtca2021-ryoshi-211025.pdf

mtca2021-ryoshi-amc.mp4

11:30 → 12:10 国産MCHの開発経験談

Speaker: 箭原 正道 (サンリツオートメイション株式会社)

mtca2021-yahara-211026.pdf

mtca2021-yahara-mch.mp4

12:10 → 13:30 昼食休憩

13:30 → 14:10 MTCA シェルフ開発・製作について

Speaker: 森本 正治 (株式会社ユーバー)

mtca2021-morimoto-211025.pdf

mtca2021-morimoto-shelf.mp4

14:10 → 14:50 MTCA.4 規格 RTM、eRTMの製作

Speaker: 矢上 重男 (株式会社キャンドックスシステムズ)

mtca2021-yagami-211025.pdf

mtca2021-yagami-rtm.mp4

14:50 → 15:30 SPring-8 / SACLA における高周波制御とビーム診断での MTCA.4 の活用

Speaker: 前坂 比呂和 (理化学研究所 放射光科学研究センター)

mtca2021-maesaka-211026.pdf

mtca2021-maesaka-sacla.mp4

15:30 → 15:50 休憩

15:50 → 16:00 Zoom 日本語通訳の説明

16:00 → 16:40 Electromagnetic Compatibility (EMC) and Analog Design Aspects in MicroTCA Crates (日本語通訳付き)

Speaker: Frank Ludwig (DESY)

mtca2021-ludwig-211026.pdf

mtca2021-ludwig-emc-eng.mp4

mtca2021-ludwig-emc-jpn.mp4

Wednesday, 27 October

10:00 → 10:10 Openning: Fumihiko Tamura

mtca2021-ws_introduction-tamura-211025.pdf

10:10 → 10:40 Welcome address

Speaker: Takashi Kobayashi (Director of the J-PARC Center)

mtca2021-takashikobayashi-211027.pdf

10:40 → 11:10 μTCA(MTCA.0) FPGA-Boards Development and Applications at KEK-Tsukuba

At KEK-Tsukuba Site, Micro-TCA(MTCA.0)-based FPGA boards were developed for LLRF control systems in 2009. EPICS-IOC is embedded into them. Our MTCA-based systems were applied to accelerators at KEK ahead of other facilities in the world, and they are successfully working in the beam operation. In this talk, some reminiscences of our struggles with the development of original FPGA boards will be presented, and MTCA application state in our facilities will be also reported.

Speaker: Tetsuya Kobayashi (KEK)

mtca2021-tetsuyakobayashi-211027.pdf

11:10 → 11:30 Timing synchronization system for beam injection from SACLA to SPRING-8 storage ring

We developed a timing synchronization system for injection from the linac of the XFEL machine, SACLA, to the storage ring (SR) of SPring-8. This injection scheme is demanded by the low-emittance upgraded ring in the future. Since the RF frequencies of the linac and the SR do not have an integer multiples relation, we have to introduce a new scheme to synchronize the beam ejection timing of the linac to the desired RF bucket timing of the SR. The new system was implemented to the MTCA.4 standard modules. The control of the bucket address is done according to the pre-defined injection table. The system was installed to the linac and the measured timing jitter was better than 4 ps in rms, which was enough to obtain high injection efficiency. This injection scheme has been adopted for the user operation of SPring-8 since February 2020.

Speaker: Takashi Ohshima (JASRI)

mtca2021-ohshima-211028.pdf

11:30 → 11:50 MTCA.4 based LLRF control systems for J-PARC synchrotrons

MTCA.4 based LLRF control systems have been developed for synchrotrons of the Japan Proton Accelerator Research Complex (J-PARC). The J-PARC synchrotrons consist of the Rapid Cycling Synchrotron (RCS) and the Main Ring synchrotron(MR). Since the magnetic alloy loaded untuned RF cavity systems are used in both synchrotrons, multi-harmonic amplitude and phase control is essential and required to compensate a heavy beam loading. A MTCA.4 shelf with the DESY-type RF backplane is employed in developed LLRF control system to fit several AMC boards for controlling RF cavities. The multi-harmonic vector RF voltage control function is implemented in AMC to control the cavity RF voltage. The cavity voltage signal for the vector sum calculation and the beam phase feedback signal are exchanged between AMC boards via the MTCA backplane. The LLRF control system for the RCS was successfully deployed in 2019 and contributed to the achievement of stable acceleration of the high-intensity beam up to the design intensity, 8.3e13 protons per pulse. The prototype system for the MR was tested and used in the beam operation since 2020 to suppress unwanted harmonics. We plan to deploy the developed system to the MR during the shut-down period in 2021.

Speaker: Yasuyuki Sugiyama (KEK)

mtca2021-sugiyama-211026.pdf

11:50 → 13:30 Lunch break

13:30 → 13:50 DMMC Stamp and WIENER power supply

DMMC Stamp: DESY microTCA Technology LAB Launch the DMMC-Stamp. Embeck is responsible for domestic sales. We will first introduce you to this wonderful, small component. WIENER Power supply Low Noise 1000W PS for MTCA.4: we will introduce the features and performance.

Speaker: Tomokazu Murakoshi (Embeck)

mtca2021-murakoshi-211026b.pdf

13:50 → 14:10 Next-generation open architecture MTCA field and Vadatech MTCA.4 lineup introduction

Current status of application fields for open architecture standard products after VME / Compact-PCI and Introducing Vadatech's MTCA product lineup and FPGA-equipped high-speed AD / DA products.

Speaker: Moriaki Hakuta (LHS)

mtca2021-hakuta-211025.pdf

14:10 → 14:30 Realization of high precision analog pattern output module by MicroTCA.4

In the past, bus systems such as VME have been used for accelerator control and other systems that require stability, high reliability, and environmental resistance. For several decades, we have been designing and manufacturing VME bus boards and supplying systems. However, it has been more than 30 years since the birth of the VME standard, and the communication speed of the bus is inferior to that of the VME standard, and there are concerns about product supply in terms of maintainability. This time, we adopted the micro TCA bus standard as a module used in the pattern waveform output unit for controlling the paint bump power supply for J-PARC, which was conventionally built on the VME bus, and produced 2-channel 16-bit DA conversion analog modules as a replacement for the conventional unit. The pattern output board of the micro TCA bus standard makes the pre-set 16-bit data output patterns while synchronizing with the 1MHz clock, and outputs two types of output patterns, current patterns and voltage patterns of the paint bump power supply. This presentation will give an overview of the analog output module applying the micro TCA bus and the performance of the replacement evaluation with a conventional VME system.

Speaker: Naoki Kawamura (Hitachi Zosen Corporation )

mtca2021-kawamura-211026.pdf

14:30 → 14:50 Development of a LLRF control system at WERC

A new LLRF control system for the synchrotron at WERC is in under development. The current system consisted of DDS (Direct Digital Synthesizer), DSP (Digital Signal Processor) and analog RF circuits has been working for 20 years with making a continuous improvement in it. However the current system becomes deteriorated and can not be maintained. The new system utilizes modern FPGAs and MicroTCA.4. The new system consists of three AMCs. One is for feedback control of RF frequency and the others are for processing beam position signals. We describe details of the system and the progress of the off-beam commissioning in this report.

Speaker: Tetsuro Kurita (WERC)

mtca2021-kurita-211025-2.pdf

14:50 → 15:20 Break

15:20 → 15:40 Synchronization of several EtherCAT networks by new multi-network EtherCAT AMC client

Certain scenarios in industry and scientific research require to synchronize different EtherCAT networks with a high accuracy. The more precise the time stamp requirements become, the more difficult this task gets using classical solutions. By means of a newly developed AMC module, the time signals can be synchronously fed into and read from up to 8+1 independent EtherCAT networks. This provides a new possibility to connect classical industrial solutions to high performance MicroTCA systems in a flexible and cost-efficient way. The talk will compare this new solution to classical ones and high-light the benefits for users such as the European XFEL, Hamburg, Germany, where it will be used to connect to the installed MicroTCA systems.

Speaker: Herbert Erd (N.A.T)

mtca2021-erd_P1-211027.pdf

15:40 → 16:00 More flexible and cost-efficient x86 and non-x86 based compute power for MicroTCA systems

One of today’s setback in MicroTCA is the limited availability of (latest) x86 CPU generations in AMC formfactor. To overcome this situation and to provide more flexibility to the market N.A.T has developed a new carrier for COMex modules in AMC format which allows customers to select processing power based on exact needs, i.e. payload or control, from a small 2-core Celeron up to powerful 6 core XEON, made of the latest x86 CPU generation. The new COMex AMC carrier can host COMex modules based on TYPE 6 and 7 and is not limited to CPUs from Intel®. The new CPU carrier in AMC format will provide more flexibility and scalability to MicroTCA systems. It is a logical step in system design, from N.A.T.’s existing NAT-MCH-RTM module to the upcoming requirements addressed by the next generation of MicroTCA, providing more power, more bandwidth and higher bandwidth per AMC.

Speaker: Herbert Erd (N.A.T)

mtca2021-erd_P2-211027.pdf

16:00 → 16:20 MTCA.4 Crates: Introduction to the hardware infrastructure

nVent SCHROFF has committed itself to support the Big Science community with a broad portfolio of MTCA.4 crates as well as a full range of adjacent accessories like AMC front panels, filler panels, air blockers and guide rails. This presentation shows the range of nVent SCHROFF crates from 1U, 3U, and development crates up to the various versions of 12 Slots crates with different options and backplane topologies. In addition, the accessories will be presented and some hints are given on how and when to use filler panels.

Speaker: Christian Ganninger (nVent)

mtca2021-ganninger-211027.pdf

16:20 → 16:40 Overview of MMC stamp software development kit

The Module Management Controller (MMC) is a mandatory component of every AMC board. DESY is developing, maintaining and licensing a turn-key MMC solution that is used on several hundred boards in different facilities - on DESY's own products as well as on third-party AMC boards developed by industrial customers and project partners. With the growing number of different boards, a clear separation between common code shared across boards and board-specific code becomes crucial - to keep the codebase maintainable as well as to provide a high-level API for AMC board developers who should be able to focus on their application without having to care about the low-level workings of the MMC. The high-level API makes a software development kit (SDK) possible, which is offered to MMC Stamp System-on-Module customers who wish to customize the pre-programmed firmware according to their needs. This presentation gives a brief overview of the SDK and the high-level API it provides to AMC board developers.

Speaker: Patrick Huesmann (DESY)

mtca2021-huesmann-211027.pdf

16:40 → 17:00 Status and future plans of the MicroTCA.4 compliant LO and CLK generation module

The DRTM-LOG1300 (uLOG) is a MicroTCA.4 compliant LO and CLK generation module. It has been operating on EuXFEL for several years now. Currently other experiments expressed their interest for the LO and CLK generation modules operating at different reference frequencies. However not all the required LO and CLK frequencies can be generated using the currently implemented architecture. In parallel we have started a collaboration with the company KVG Quartz Crystal Technology GmbH to produce and test the newly produced modules. In this talk we will present other possible LO and CLK generation techniques which can provide LO and CLK signals with reference frequencies 500 MHz, 3 GHz and others. It is possible to order all these modules from KVG Quartz Crystal Technology GmbH.

Speaker: Uros Mavric (DESY)

mtca2021-mavric-211027.pdf

Thursday, 28 October

10:00 → 10:10 From orgnizers (if any): Fumihiko Tamura

Fumihiko Tamura

10:10 → 10:40 MicroTCA.4 projects at Sirius light source

The MicroTCA.4 standard has been employed at Sirius light source for a few accelerator systems: electron and photon BPM electronics, fast orbit feedback and timing receiver for distributed power supplies. In total 22 MicroTCA.4 crates run routinely at Sirius for users operation. This talk will describe the existing systems and short term plans. Special focus will be given to the issues found and lessons learned.

Speaker: Daniel Tavares (Sirius/LNLS )

mtca2021-tavares-4-211028.pdf

10:40 → 11:00 Survey on MTCA in Japanese accelerators

MTCA is expected to be the next-generation platform for accelerator controls and many applications of MTCA are found in the acclerators in the world, while it seems slow to spread to the Japanese accelerator facilities. To investigate the reason, a small survey was performed in 2020 among KEK and J-PARC members, who are working for LLRF, monitors, and control systems. The survey results and the issues that were identified, are reported.

Speaker: Fumihiko Tamura (J-PARC Center)

mtca2021-tamura-211028.pdf

11:00 → 11:20 Timing and low level RF control system of new injector LINAC for NEW SUBARU

A new linear accelerator was constructed for the New SUBARU (NS), a 1.5 GeV synchrotron radiation facility. The accelerating frequencies used at the new linac are 238 MHz, 476 MHz, 2856 MHz (SB), and 5712 MHz (CB). The required accuracy for the amplitude and phase of the accelerating field are 8E-4 and 0.2 degree, respectively in the most severe case. Also, the master trigger of the linac must be synchronized with both the aimed bucket timing of the ring and the linac master clock. To fulfill these requirements, the timing system and Low-Level RF (LLRF) control system were developed using the modules of Micro Telecommunication Computing Architecture 4 (MTCA.4) standard. The master trigger and the clock of the linac are generated at the master unit located near the LLRF station of the ring, and are delivered to four LLRF subunits of the linac through the optical links. The amplitude and phase of the accelerating field are controlled based on In-phase and Quadrature (IQ) scheme. The achieved stabilities in rms are 7E-4 in amplitude and 0.2 degree in phase, which satisfy the requirements. The operation of the NS has been carried out stably since April 2021 without any significant faults.

Speaker: Eito Iwai (JASRI)

mtca2021-wai-211028.pdf

11:20 → 11:40 Uniform communication over the MTCA interconnect and network

A low-level RF controller has been developed for the accelerator controls for SuperKEKB, Super-conducting RF Test facility (STF) and Compact-ERL (cERL) at KEK. The feedback mechanism will be performed on Virtex-5 FPGA with 16-bit ADCs and DACs. The card was designed in the form-factor of an advanced mezzanine card (AMC) for a MicroTCA shelf. An embedded EPICS IOC on the PowerPC core in FPGA will provide the global controls through channel access (CA) protocol on the backplane interconnect of the shelf. No other mechanisms are required for the external linkages. CA is exclusively employed in order not only to make the AMC cards to communicate with each other, but also to communicate with central controls and with an embedded IOC on a Linux-based PLC for slow controls.

Speaker: Kazuro Furukawa (KEK)

mtca2021-furukawa-211028.pdf

11:40 → 12:00 LLRF system based on MTCA.4 boards for the J-PARC Linac

In the J-PARC linac, the low-level radio frequency (LLRF) system with the digital feedback (DFB) and the digital feedforward (DFF) based on the cPCI platform was adopted for the satisfaction of amplitude and phase stabilities. It was operated without serious problems. However, it has been used since the beginning of the J-PARC and are more than fifteen years into the development. The increase of the failure frequency for this system is expected. In addition, it is difficult to maintain it for some discontinued boards of DFB and DFF and the older OS and developing environment of software. Therefore, we had developed the new digitizer based on MTCA.4 boards for the LLRF system of the next generation. We installed and operated the seventeen digitizers at DTL3 and SDTL stations from the summer shutdown of 2020. In addition, we will install the three digitizers and one the MTCA.4 system, which is used to control four stations at MEBT1, in this summer. The project and the status of the LLRF system based on MTCA.4 for the J-PARC linac are introduced.

Speaker: Kenta Futatsukawa (KEK)

mtca2021-futatsukawa-211028.pdf

12:00 → 13:30 Lunch break

13:30 → 13:50 Status of MTCA.4 standard based LLRF control board for the linear accelerator of the STF-2 and the ILC

In the International Linear Collider (ILC), the RF power generated with a single RF source (10 MW multi-beam klystron) is supplied to 39 superconducting cavities, and the amplitude and phase of each cavity are operated by vector sum-feedback control to keep the accelerating electric field and phase constant in single RF unit. At the Superconducting Test Facility (STF) of the High Energy Accelerator Research Organization (KEK), the STF-2 accelerator has been constructed and operated for the research and development of the ILC. In order to build a minimum configuration of the low-level RF control system for the ILC, the MTCA.4 standard based digital control board using ZYNQ have been developed for the LLRF system of the STF2 accelerator. The present status of the digital control board developed at STF and the future plan for ILC are reported.

Speaker: Toshihiro Matsumoto (KEK)

mtca2021-matsumoto-211028.pdf

13:50 → 14:10 Adoption of the micro-TCA to the next KEK-PF LLRF system

We plan to replace the low-level RF (LLRF) system at the KEK-PF. The present LLRF system is composed of analog modules, while the new system will be composed of digital boards which are based on the μTCA.4 standards. On the other hand, we will also adopt the μTCA to the monitor system for the transient beam loading effect. In this presentation, we introduce the present RF system, the overview of the new LLRF system, and the monitor system.

Speaker: Daichi Naito (KEK)

mtca2021-naito-211027.pdf.pdf

14:10 → 14:30 Utilization of a unique MicroTCA.4-based digitizer for monitoring comb-like beam at the J-PARC Linac

The J-PARC linac beam pulse, formed by a chopper system placed at the MEBT, consists of a series of intermediate pulses with a comb-like structure synchronized with the rf frequency of the rapid cycling synchrotron (RCS). With a general-purpose digitizer, performing signal processing depending on the presence or absence of such an intermediate pulse is challenging. Besides, monitoring the entire macro pulse cannot be achieved on the current digitizer during the beam operation. However, sequentially measuring and monitoring the comb-like beam, stable operation with less beam loss can be achieved even at higher beam intensity in the J-PARC. To this end, a beam monitor digitizer, including a digital signal processing function, that complies with the MicroTCA.4 (Micro Telecommunications Computing Architecture.4) standard has been developed. We present the architecture and implementation of the beam monitor digitizer within this paper.

Speaker: Ersin Cicek (KEK)

mtca2021-Cicek-211028.pdf

14:30 → 14:50 Planned upgrade of the LLRF system at the STF vertical test stand at KEK

The RF system currently used at the vertical test stand at the Superconducting RF Test Facility (STF) at KEK was established more than two decades ago and is all analog. It was decided to upgrade the controller part with a state-of-the-art MicroTCA.4-based LLRF system, allowing self-excited loop (SEL) operation. The realization of this upgrade is planned to be performed in collaboration with DESY.

Speaker: Mathieu Omet (KEK)

mtca2021-omet-211025.pdf

14:50 → 15:20 Break

15:20 → 15:40 4th Generation NAT-MCH

After more than 15 years and the 3rd MCH generation being currently deployed, the next generation 4 MCH is will become available soon, providing new features and functions. N.A.T will explain how to transit from today’s MCH will to the 4th generation MCH and what the differences and benefits are. Also, the new generation MCH is designed to meet the upcoming requirements addressed by the next generation of MicroTCA, providing more power, more bandwidth and higher bandwidth.

Speaker: Herbert Erd (N.A.T)

mtca2021-erd_P3-211027.pdf

15:40 → 16:00 Digitizers for Big Physics

Teledyne SP Devices provides world-leading modular data acquisition systems. As a long-term partner of MicroTCA Technology Lab, it offers various solutions in µTCA.4 form. Apart from getting a brief overview of the existing portfolio of products, you will get a glimpse of future developments. New functions and implementations will be highlighted and discussed. For example, a new way to take benefit of open FPGA architecture by defining a custom algorithm for advanced trigger requirements. We empower engineers and scientists to capture complex data enabling discovery and differentiated products.

Speaker: Kacper Matuszynski (Teledyne SP Devices )

mtca2021-matuszynski-211108.pdf

16:00 → 16:20 Experience with MTCA.4 LLRF systems at DESY

The first MTCA.4 LLRF system at DESY has been tested at the Free Electron LASer in Hamburg FLASH back in 2010. Since then, more and more accelerator facilities within DESY have been equipped with this technology. Today, the European XFEL is operated with a LLRF system consisting of more than 50 MTCA.4 crates. Maintaining all facilities in a twenty-four-seven on-call service allowed us to gain a lot of experience with these system over the last years. Especially the operation in a radiation prone and non-accessible environment demands a continuous improvement of the reliability and development of automation routines. As a next step an upgrade of parts of the LLRF systems at FLASH is planned which are in operation since almost 10 years.

Speaker: Christian Schmidt (DESY)

mtca2021-schmidt-211028.pdf

16:20 → 16:40 Development of the MicroTCA specification: Preparing the next generation

To keep the MicroTCA standard viable over many years it must follow the development of technology. A PICMG working group was formed to incorporate faster Ethernet and PCIe communication into the standard. This talk will discuss the direction and challenges of the next generation MicroTCA standard.

Speaker: Kay Rehlich (DESY)

mtca2021-rehlich-211028.pdf

16:40 → 17:00 Closing remarks: Fumihiko Tamura

mtca2021-closing-tamura-211028.pdf